Project : | USB_IPL |
Build Time : | 09/29/14 22:35:14 |
Device : | CY8C5267LTI-LP089 |
Temperature : | -40C - 85/125C |
Vdda : | 3.30 |
Vddd : | 3.30 |
Vio0 : | 3.30 |
Vio1 : | 3.30 |
Vio2 : | 3.30 |
Vio3 : | 3.30 |
Voltage : | 3.3 |
Vusb : | 3.30 |
Clock | Domain | Nominal Frequency | Required Frequency | Maximum Frequency | Violation |
---|---|---|---|---|---|
Clock_1(routed) | Clock_1(routed) | 2.000 Hz | 2.000 Hz | N/A | |
CyILO | CyILO | 100.000 kHz | 100.000 kHz | N/A | |
CyIMO | CyIMO | 24.000 MHz | 24.000 MHz | N/A | |
CyMASTER_CLK | CyMASTER_CLK | 66.000 MHz | 66.000 MHz | N/A | |
Clock_1 | CyMASTER_CLK | 2.000 Hz | 2.000 Hz | N/A | |
CyBUS_CLK | CyMASTER_CLK | 66.000 MHz | 66.000 MHz | N/A | |
CyPLL_OUT | CyPLL_OUT | 66.000 MHz | 66.000 MHz | N/A |
Source | Destination | Delay (ns) | ||||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ClockBlock/dclk_0 | LED(0)_PAD | 18.127 | ||||||||||||||||||||||||||||||||||||||||||
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ClockBlock/dclk_0 | LED(0)_PAD | 18.127 | ||||||||||||||||||||||||||||||||||||||||||
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